fr1a thru fr1k surface mount fast switching rectifier voltage - 50 to 800 volts current - 1.0 ampere features l for surface mounted applications l low profile package l built - in strain relief l easy pick and place l fast recovery times for high eff iciency l plastic package has underwriters laboratory flammability classification 94v - o l glass passivated junction l high temperature soldering: 260 /10 seconds at terminals mechanical data case: jedec do - 214aa molded plastic terminals: solder plated, solderable per mil - std - 750, method 2026 polarity: indicated by cathode band standard packaging: 12mm tape (eia - 481) weight: 0.003 ounce, 0.09 3 gram maximum ratings and electrical characteristics ratings at 25 ambient temperature unless otherwise specified. resistive or inductive load. for capacitive load, derate current by 20%. symbols fr1a fr1b FR1D fr1g fr1j fr1k units maximum recurrent p eak reverse voltage v rrm 50 100 200 400 600 800 volts maximum rms voltage v rms 35 70 140 280 420 560 volts maximum dc blocking voltage v dc 50 100 200 400 600 800 volts maximum average forward rectified current, at t l =90 i (av) 1.0 amps peak forward su rge current 8.3ms single half sine - wave superimposed on rated load(jedec method) i fsm 30.0 amps maximum instantaneous forward voltage at 1.0a v f 1.3 volts maximum dc reverse current t a =25 at rated dc blocking voltage t a =125 i r 5.0 150 a maximum re verse recovery time (note 1) t j =25 t rr 150 250 500 n s typical junction capacitance (note 2) c j 12 p f maximum thermal resistance (note 3) r jl 30 /w operating and storage temperature range t j ,t stg - 50 to +150 notes: 1. reverse recovery test condition s: i f =0.5a, i r =1.0a, irr=0.25a smb/do - 214aa
2. measured at 1 mhz and applied reverse voltage of 4.0 volts 3. 8.0mm 2 (.013mm thick) land areas rating and characteristic curves fr1a thru fr1k fig. 1 - forward current derating curve fig. 2 - typical junction c apacitance fig. 3 - peak forward surge current fig. 4 - typical instantaneous forward characteristics
fig. 5 - reverse recovery time characteristics and test circuit diagram
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